Eleventh International Workshop on

Programmability and Architectures for Heterogeneous Multicores

To be held in conjunction with:
the 13th International Conference on
High-Performance and Embedded Architectures and Compilers (HiPEAC)

Manchester, United Kingdom, January 24, 2018


Computer manufacturers have embarked on the many-core roadmap, promising to add more and more cores/hardware threads on their chips. The ever-increasing number of cores and heterogeneity in architectures has placed new burdens on the programming community. Software needs to be parallelized and optimized for accelerators such as GPUs in order to take advantage of the new breed of multi-/many-core computers. As a result, progress in how to easily harness the computing power of multi-core architectures is in great demand.

The eleventh edition of the MULTIPROG workshop aims to bring together researchers interested in programming models, runtimes, and computer architecture. The workshop's emphasis is on heterogeneous architectures and covers issues such as:

MULTIPROG is intended for quick publication of early results, work-in-progress, etc., and is not intended to prevent later publication of extended papers. Informal proceedings with accepted papers will be made available at the workshop and online at the workshop’s web page http://research.ac.upc.edu/multiprog/.

Topics of interest

Papers are sought on topics including, but not limited to:

Please, follow the following link to submit your contribution: https://easychair.org/conferences/?conf=multiprog2018


10:00 Welcome and Keynote

Welcome (10 min)
MULTIPROG organizers.

Keynote: Anton Lokhmotov (dividiti Ltd)
Title: Accelerating AI/SW/HW co-design and optimisation via open competition and collaboration (50 min)

11:30 Session 1: Heterogeneous Architectures

Invited talk: Understanding and programming PULP: a RISC-V based open-source many-core architecture (30 min), Frank K. Gürkaynak (ETHz)

Design Space Exploration for Optimizing Sustained Memory Throughput in Heterogeneous HPC Devices (20 min)
Syed Waqar Nabi and Wim Vanderbauwhede

Implementation of an FPGA Accelerator for Text Search Using a Wavelet-Tree-Based Succinct-Data-Structure (20 min)
Taisuke Ono, Hasitha Waidyasooriya and Masanori Hariyama

Accelerating Deep Neural Networks on Low Power Heterogeneous Architectures (20 min)
Manolis Loukadakis, José Cano and Michael O'Boyle

14:00 Session 2: Programming and Optimizations

Invited talk: Malleability for HPC Applications: Easing the Path for Legacy Codes with LAIK (30 min)
Josef Weidendorfer (Technische Universität München)

Level Graphs: Generating Benchmarks for Concurrency Optimizations in Compilers (20 min)
Andrés Goens, Sebastian Ertel, Justus Adam and Jeronimo Castrillon

PPTA: Prefetch-Process-Thread-Alternation to Speed Up Dijkstra's Algorithm (20 min)
Konstantinos Kanellopoulos, Konstantinos Nikas, Dimitrios Siakavaras, Vasileios Karakostas, Georgios Goumas and Nectarios Koziris

Resource utilization analysis in a disaggregated datacenter architecture (20 min)
Marti Torrents, Josue Quiroga, Tugberk Arkose, Ferad Zyulkyarov and Mario Nemirovsky

Important dates

Full paper submission: Extended until November 5, 2017 (anywhere on Earth). Submission deadline: October 22, 2017
Notification authors: December 8, 2017. November 27, 2017

Paper Submission

MULTIPROG accepts contributions of research papers describing early research on emerging topics. When preparing your submission, please, adhere to the following format specification:

Papers should preferably use LNCS format (up to 12 pages, not including references). Single column (up to 12-Pages) or double column (up to 6-pages) formats are also accepted.

The authors of the accepted papers will be requested to provide the final version of their paper in LNCS format. Please use the templates below:

Submission link: https://easychair.org/conferences/?conf=multiprog2018


Miquel Pericàs Chalmers University of Technology Sweden miquelp[at]chalmers.se
Vassilis Papaefstathiou FORTH-ICS Greece papaef[at]ics.forth.gr
Oscar Palomar University of Manchester UK oscar.palomar[at]manchester.ac.uk
Ferad Zyulkyarov Barcelona Supercomputing Center Spain ferad.zyulkyarov[at]bsc.es

Program committee

Avi Mendelson Technion Israel
Christos Kotselidis University of Manchester UK
Dong Ping Zhang eBay USA
Hans Vandierendonck Queen's University of Belfast UK
Jose Maria Arnau Universitat Politècnica de Catalunya - BarcelonaTech Spain
Pedro Trancoso University of Cyprus Cyprus
Sasa Tomic IBM Switzerland
Trevor E. Carlson National University of Singapore Singapore
Vasileios Karakostas National Technical University of Athens Greece
More to be added

Webmaster: ferad.zyulkyarov[at]bsc.es