Twelfth International Workshop on
Programmability and Architectures for Heterogeneous Multicores
To be held in conjunction with:
the 14th International Conference on
High-Performance and Embedded Architectures and Compilers (HiPEAC)
Valencia, Spain, January 21, 2019
Computer manufacturers have embarked on the many-core roadmap, promising to add more and more cores/hardware threads on their chips. The ever-increasing number of cores and heterogeneity in architectures has placed new burdens on the programming community. Software needs to be parallelized and optimized for accelerators such as GPUs in order to take advantage of the new breed of multi-/many-core computers. As a result, progress in how to easily harness the computing power of multi-core architectures is in great demand.
The twelfth edition of the MULTIPROG workshop aims to bring together researchers interested in programming models, runtimes, and computer architecture. The workshop's emphasis is on heterogeneous architectures and covers issues such as:
- How can future parallel programming models improve software productivity?
- How should compilers, runtimes and architectures support programming models and emerging applications?
- How to design efficient data structures and innovative algorithms?
MULTIPROG is intended for quick publication of early results, work-in-progress, etc., and is not intended to prevent later publication of extended papers. Informal proceedings with accepted papers will be made available at the workshop and online at the workshop’s web page http://research.ac.upc.edu/multiprog/.
Papers are sought on topics including, but not limited to:
- Multi-core architectures
- Architectural support for compilers/programming models
- Processor (core) architecture and accelerators, in particular GPUs
- Memory system architecture
- Performance, power, temperature, and reliability issues
- Heterogeneous computing
- Algorithms and data structures for heterogeneous systems
- Application specific architectures for AI, ML, BigData, Deep Learning, IoT
- Programming models for multi-core architectures
- Language extensions
- Run-time systems
- Compiler optimizations and techniques
- Benchmarking of multi-/many-core architectures
- Tools for discovering and understanding parallelism
- Tools for understanding performance and debugging
- Case studies and performance evaluation
|Full paper submission:||Extended until November 16, 2018 (anywhere on Earth). Submission deadline: November 2, 2018|
|Notification authors:||November 30, 2018|
MULTIPROG accepts contributions of research papers describing early research on emerging topics. When preparing your submission, please, adhere to the following format specification:
Papers should preferably use LNCS format (up to 12 pages, not including references). Single column (up to 12-Pages) or double column (up to 6-pages) formats are also accepted.The authors of the accepted papers will be requested to provide the final version of their paper in LNCS format. Please use the templates below:
- LNCS Latex template: ftp://ftp.springer.de/pub/tex/latex/llncs/latex2e/llncs2e.zip
- Word template: ftp://ftp.springer.de/pub/tex/latex/llncs/word/splnproc1110.zip
Submission link: https://easychair.org/conferences/?conf=multiprog2019
|Miquel Pericàs||Chalmers University of Technology||Sweden||miquelp[at]chalmers.se|
|Oscar Palomar||University of Manchester||UK||oscar.palomar[at]manchester.ac.uk|
|Ferad Zyulkyarov||Barcelona Supercomputing Center||Spain||ferad.zyulkyarov[at]bsc.es|