Eighth Workshop on
Programmability Issues for Heterogeneous Multicores
(MULTIPROG-2015)
To be held in conjunction with:
the 10th International Conference on
High-Performance and Embedded Architectures and Compilers (HiPEAC)
Amsterdam, The Netherlands, January 20, 2015
Computer manufacturers have embarked on the many-core roadmap, promising to add more and more cores/hardware threads on their chips. The ever-increasing number of cores and heterogeneity in architectures has placed new burdens on the programming community. Software needs to be parallelized and optimized for accelerators such as GPUs in order to take advantage of the new breed of multi-/many-core computers. As a result, progress in how to easily harness the computing power of multi-core architectures is in great demand.
The eighth edition of the MULTIPROG workshop aims to bring together researchers interested in programming models, runtimes, and computer architecture. The workshop's emphasis is on heterogeneous architectures and covers issues such as:
- How can future parallel programming models improve software productivity?
- How should compilers, runtimes and architectures support programming models and emerging applications?
- How to design efficient data structures and innovative algorithms?
MULTIPROG is intended for quick publication of early results, work-in-progress, etc., and is not intended to prevent later publication of extended papers. Informal proceedings with accepted papers will be made available at the workshop.
Topics of interest
Papers are sought on topics including, but not limited to:
- Multi-core architectures
- Architectural support for compilers/programming models
- Processor (core) architecture and accelerators
- Memory system architecture
- Performance, power, temperature, and reliability issues
- Heterogeneous computing
- Algorithms and data structures for heterogeneous systems
- Applications for heterogeneous computing and real-time graphics
- Programming models for multi-core architectures
- Language extensions
- Run-time systems
- Compiler optimizations and techniques
- Benchmarking of multi-/many-core architectures
- Tools for discovering and understanding parallelism
- Tools for understanding performance and debugging
- Case studies and performance evaluation
Program
Download the informal proceedings of the MULTIPROG'2015 Workshop
10:00 MULTIPROG Welcome
Keynote: Georgi Gaydadjiev (Maxeler)Title: Everything You Always Wanted to Know About Dataflow Engines Virtualization
11:30 Performance Analysis
Performance and Energy Consumption Evaluation of the Client-Server Synchronization Model for Concurrent Lists in Embedded SystemsLazaros Papadopoulos, Ivan Walulya, Paul Renaud-Goud, Philippas Tsigas, Dimitrios Soudris and Brendan Barry
On Parallel Evaluation of Matrix-Based Dynamic Programming Algorithms
David Bednárek, Michal Brabec and Martin Kruliš
Invited talk: Dimitrios Nikolopoulos (Queen's University of Belfast)
Title: Evaluating Servers using Iso-Metrics: Power, QoS and Programmability Implications
14:00 Multicore Architectures
Memory Link compression to speed up scientific workloadsChloe Alverti, Georgios I. Goumas, Konstantinos Nikas, Angelos Arelakis, Nectarios Koziris and Per Stenstrom
Towards a Scalable Functional Simulator for the Adapteva Epiphany Architecture
Ola Jeppsson and Sally McKee
Invited talk: Mauricio Alvarez-Mesa (TU Berlin & Spin Digital)
Title: Mapping Video Codecs to Heterogeneous Architectures
16:00 Programming Models & Runtimes
Task Parallelization as a Service: A Runtime System for Automatic Shared Task DistributionLuc Bläser
Tangram: a High-level Language for Performance Portable Code Synthesis
Li-Wen Chang, Abdul Dakkak, Christopher Rodrigues and Wen-Mei Hwu
Analysis of the overheads incurred due to speculation in a task based programming model
Rahulkumar Gayatri, Rosa M. Badia and Eduard Ayguade
17:15 Closing Remarks
Important dates
| Submission deadline: | October 24, 2014 Extended until October 31, 2014. |
| Notification to authors: | November 28, 2014 December 5, 2014. |
Paper Submission
Submissions should not exceed 12 pages and should be formatted according to the LNCS format for CS Proceedings. This limit includes text, figures, tables and references. Please use the templates below:
- Latex template: ftp://ftp.springer.de/pub/tex/latex/llncs/latex2e/llncs2e.zip
- Word template: ftp://ftp.springer.de/pub/tex/latex/llncs/word/splnproc1110.zip
Submission link: https://easychair.org/conferences/?conf=multiprog2015
Organizers
| Miquel Pericàs | Chalmers University of Technology | Sweden | miquelp[at]chalmers.se |
| Vassilis Papaefstathiou | Chalmers University of Technology | Sweden | vaspap[at]chalmers.se |
| Oscar Palomar | Barcelona Supercomputing Center | Spain | oscar.palomar[at]bsc.es |
| Ferad Zyulkyarov | Barcelona Supercomputing Center | Spain | ferad.zyulkyarov[at]bsc.es |
Steering committee
| Eduard Ayguade | UPC/Barcelona Supercomputing Center | Spain | eduard[at]ac.upc.edu |
| Benedict R. Gaster | Qualcomm | USA | bgaster[at]qti.qualcomm.com |
| Lee Howes | Qualcomm | USA | lhowes[at]qti.qualcomm.com |
| Per Stenstrom | Chalmers University of Technology | Sweden | pers[at]chalmers.se |
| Osman Unsal | BSC-Microsoft Research Centre | Spain | osman.unsal[at]bsc.es |
Program committee
| Mats Brorsson | KTH Royal Institute of Technology | Sweden |
| Pascal Felber | University of Neuchatel | Switzerland |
| Roberto Giorgi | University of Siena | Italy |
| Daniel Goodman | Oracle Labs | UK |
| Hakan Grahn | Blekinge Institute of Technology | Sweden |
| Ali Jannesari | RWTH Aachen University | Germany |
| Paul Kelly | Imperial College of London | UK |
| Mikel Lujan | University of Manchester | UK |
| Vladimir Marjanovic | High Performance Computing Center Stuttgart | Germany |
| Tim Mattson | Intel | USA |
| Simon McIntosh-Smith | University of Bristol | UK |
| Avi Mendelson | Technion | Israel |
| Dimitris Nikolopoulos | Queen's University of Belfast | UK |
| Andy Pimentel | University of Amsterdam | The Netherlands |
| Oscar Plata | University of Malaga | Spain |
| Yanos Sazeides | University of Cyprus | Cyprus |
| Ruben Titos | Barcelona Supercomputing Center | Spain |
| Dongping Zhang | AMD | USA |
External Reviewers
| Adria Armejach | Barcelona Supercomputing Center | Spain |
| Madhavan Manivannan | Chalmers University of Technology | Sweden |
| Anita Sobe | Université de Neuchâtel | Switzerland |
| Nehir Sonmez | Barcelona Supercomputing Center | Spain |
| Alejandro Villegas | University of Malaga | Spain |
| Gulay Yalcin | Barcelona Supercomputing Center | Spain |
| Foivos S. Zakkak | Foundation of Research and Technology Hellas | Greece |
Webmaster: ferad.zyulkyarov[at]bsc.es