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Fifth International Symposium on Advanced Research in Asynchronous Circuits and Systems Barcelona (Spain), 18-21 April 1999 |
| TECHNICAL PROGRAM |
18:00 - 19:30 Registration (Hotel Arenas)19:30 - 21:00 Welcome Reception (Hotel Arenas)
08:15 - 08:45 Site registration08:45 - 09:00 Opening Session Chair: Jordi Cortadella
09:00 - 10:00 Keynote Session I Chair: Ganesh Gopalakrishnan
The 2000 MHz Bug - End of the Millennium of Synchronous Systems ? Richard F. Lyon
10:00 - 10:15 Break
10:15 - 11:15 Session I: Verification Techniques Chair: John Brzozowski
Verification of Delayed-Reset Domino Circuits Using ATACS. W. Belluomini, C.J. Myers, H.P. Hofstee
A Timing Verifier and Timing Profiler for Asynchronous Circuits. P.A. Karlsen, P.T. Roeine
11:15 - 11:30 Break
11:30 - 12:30 Session II: Low Power / Noise Chair: Kees van Berkel
Reconfigurable Latch Controllers for Low Power Asynchronous Circuits. M. Lewis, J.D. Garside, L. Brackenbury
Behavioral Transformations to Increase the Noise Immunity of Asynchronous Specifications. A. Taubin, A. Kondratyev, J. Cortadella, L. Lavagno
12:30 - 14:00 Lunch
14:00 - 15:00 Keynote Session II Chair: Steve Furber
Exploiting BDDs in Higher Order Logic, with Applications to Asynchronous Circuits. Michael J.C. Gordon
15:00 - 15:30 Break
15:30 - 17:00 Session III: Microprocessor Design Chair: Takashi Nanya
AMULET3 Revealed. J.D. Garside, S.B. Furber, S.-H. Chung
RAPPID: An Asynchronous Instruction Length Decoder. S. Rotem, K.S. Stevens, R. Ginosar, P.A. Beerel, C.J. Myers, K. Yun, R. Kol, C. Dike, M. Roncken, B. Agapiev
Memory Faults in Asynchronous Microprocessors. D.W. Lloyd, J.D. Garside, D.A. Gilbert
17:00 - 17:30 Break
17:30 - 19:00 Panel Session
Synchronous/Asynchronous Trade-offs in Industrial Applications.
Organizers: Prabhakar Kudva Luciano Lavagno
Panelists: Kees van Berkel (Philips) Craig Farnsworth (Cogency) Peter Hofstee (IBM) Manpreet Khaira (Intel Corp.) Richard F. Lyon (Foveon, Inc. and Caltech) Ken Stevens (Intel Corp.)
09:00 - 10:30 Session IV: Timing Analysis
Chair: Ran Ginosar
Symbolic Time Separation of Events.
T. Amon, H. Hulgaard
Bounding Average Time Separations of Events in Stochastic Timed Petri
Nets with Choice.
A. Xie, S. Kim, P.A. Beerel
Timed Trace Theoretic Verification Using Partial Order Reduction.
T. Yoneda, H. Ryu
10:30 - 11:00 Break
11:00 - 12:30 Session V: Synthesis
Chair: Stephen Unger
Projection: A Synthesis Technique for Concurrent Systems.
R. Manohar, T.-K. Lee, A.J. Martin
A Design Framework for Asynchronous / Synchronous Circuits Based on
CHP to HDL Translation.
M. Renaudin, P. Vivet, F. Robin
From STG to Extended-Burst-Mode Machines.
J. Beister, G. Eckstein, R. Wollowski
12:30 - 14:00 Lunch
14:00 - 15:30 Session VI: Arbitration
Chair: David Kinniment
A Counterflow Pipeline Experiment.
B. Coates, J. Ebergen, J. Lexau, S. Fairbanks, I. Jones, A. Ridgway,
D. Harris, I. Sutherland
A Fast, asp*, RGD Arbiter.
M.R. Greenstreet, T. Ono-Tesfaye
Real-Time Merging.
M.R. Greenstreet
15:30 - 20:00 Open Hours (Excursion)
20:00 Banquet
El Palauet Luca
C/ Enric Granados, 23
9:00 - 10:00 Keynote Session III
Chair: Jens Sparsø
Asynchronous Macromodules were a Pain to Build but a Joy to Use.
Wesley A. Clark
10:00 - 10:15 Break
10:15 - 11:15 Demo Session I (Industry)
Chair: Enric Pastor
The PCA5007 Pager IC: What Makes it Tick.
Kees van Berkel
An HDL methodology for Null Convention Logic.
Michiel Ligthart
11:15 - 11:30 Break
11:30 - 12:30 Demo Session II (Academy)
Chair: Enric Pastor
Using Balsa for Asynchronous Synthesis.
Doug Edwards
Design of DI Processes.
Willem Mallon
MINIMALIST: an Environment for the Synthesis and Testability
of Burst-Mode Asynchronous Machines.
Steven Nowick
CASCADE: a Tool for Deriving Extended-Burst-Mode Machines
from STGs.
Gernot Eckstein
University of Kaiserslautern
di2pn: a Tool for Automated Translation from DI Algebra to
Petri Nets.
Dennis Furey
12:30 - 14:00 Lunch
14:00 - 15:30 Session VII: Pushing the performance limit
Chair: Bill Coates
Theoretical Limits on the Data Dependent Performance of Asynchronous
Circuits.
D. Kearney
Relative Timing.
K.S. Stevens, S. Rotem, R. Ginosar
Two-Phase Asynchronous Wave-Pipelines and Their Application to
a 2D-DCT.
O. Hauck, M. Garg, S.A. Huss
15:30 - 16:00 Break
16:00 - 17:00 Session VIII: Theory
Chair: Alex Kondratyev
Analysis and Applications of the XDI model.
W.C. Mallon, J.T. Udding, T. Verhoeff
A Self-Timed Implementation of Boolean Functions.
M. Saarepera, T. Yoneda
17:00 - 17:30 Break
17:30 - 18:00 Award and Closure Session
Chair: Mark Josephs