High Performance Computing Group - Industrial
Affiliates Program
Software Managed Caches
Project Leader
Project Members
Project Description
Exposing hardware features to the compiler is an interesting alternative
to reduce the growing complexity of processors. In this topic, we have
implemented a data locality analysis tool. This tool has been used to optimize
the memory performance in a different ways: a) We have proposed a software
prefetching technique for software pipeling loops; b) We have proposed
a multi-module cache architecture, each module being specialized in a different
type of locality, that is partially managed by the compiler through the
locality analyisis.
Relevant publications
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"A Locality Sensitive Multi-Module cache with Explicit Management"
F. Jesus Sanchez and Antonio Gonzalez
Technical Report #UPC-DAC-1998-19, Universitat Politecnica de Catalunya,
July 1998.
Undisclosed . Contact: F. Jesus
Sanchez
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"Fast, Flexible,
and Accurate Data Locality Analysis"
F. Jesus Sanchez and Antonio Gonzalez
Procs. of the Int. Conf. on Parallel Architecture and Compiler Techniques
(PACT'98), Paris, France, Oct. 1998
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"Cache
Sensitive Modulo Scheduling"
F. Jesus Sanchez and Antonio Gonzalez
Proc. of 30 th. IEEE/ACM Int. Symposium on Microarchitecture (MICRO-30),
Research Triangle Park, NC, (USA), Dec. 1997
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"Static
Locality Analysis for Cache Management"
F. Jesus Sanchez, Antonio Gonzalez and Mateo Valero
Proc. of Int. Conf. on Parallel Architectures and Compilation Techniques
(PACT-97),San Francisco (USA), Nov. 1997
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"Software
Management of Selective and Dual Data Caches"
F. Jesus Sanchez, Antonio Gonzalez and Mateo Valero
IEEE Technical Committee on Computer Architecture Newsletter (Special
Issue on Distributed Shared Memory and related issues), pp. 3-10, March
1997