CALL FOR PAPERS
---------------

The Tenth International Workshop on 
Programmability and Architectures for Heterogeneous Multicores (MULTIPROG-2016)

To be held in conjunction with: 
the 12th International Conference on 
High-Performance and Embedded Architectures and Compilers (HiPEAC) 
Stockholm, Sweden, January 24, 2017

Workshop website: http://research.ac.upc.edu/multiprog/

Goal of the Workshop
--------------------

Computer manufacturers have embarked on the many-core roadmap, promising to add 
more and more cores/hardware threads on their chips. The ever-increasing number 
of cores and heterogeneity in architectures has placed new burdens on the 
programming community. Software needs to be parallelized and optimized for 
accelerators such as GPUs in order to take advantage of the new breed of 
multi-/many-core computers. As a result, progress in how to easily harness the 
computing power of multi-core architectures is in great demand.

The ninth edition of the MULTIPROG workshop aims to bring together researchers 
interested in programming models, runtimes, and computer architecture. The 
workshop's emphasis is on heterogeneous architectures and covers issues such as: 

    * How can future parallel programming models improve software productivity?
    
    * How should compilers, runtimes and architectures support programming 
      models and emerging applications?
    
    * How to design efficient data structures and innovative algorithms?

MULTIPROG is intended for quick publication of early results, work-in-progress, 
etc., and is not intended to prevent later publication of extended papers. 
Informal proceedings with accepted papers will be made available at the workshop 
and online at the workshop’s web page http://research.ac.upc.edu/multiprog/.


Topics of interest
------------------
Papers are sought on topics including, but not limited to:
    * Multi-core architectures
        o Architectural support for compilers/programming models
        o Processor (core) architecture and accelerators, in particular GPUs
        o Memory system architecture
        o Performance, power, temperature, and reliability issues
    * Heterogeneous computing
        o Algorithms and data structures for heterogeneous systems
        o Applications for heterogeneous computing and real-time graphics
    * Programming models for multi-core architectures
        o Language extensions
        o Run-time systems
        o Compiler optimizations and techniques
    * Benchmarking of multi-/many-core architectures
        o Tools for discovering and understanding parallelism
        o Tools for understanding performance and debugging
        o Case studies and performance evaluation


Important dates
---------------
Paper submission: November 4, 2016
Author notification: November 27, 2016


Paper submission
----------------
Submissions should not exceed 12 pages and should be formatted according to the
LNCS format for CS Proceedings. This limit includes text, figures, tables and 
references."

Please use one of the templates below:
    * Latex template: ftp://ftp.springer.de/pub/tex/latex/llncs/latex2e/llncs2e.zip
    * Word template: ftp://ftp.springer.de/pub/tex/latex/llncs/word/splnproc1110.zip

Submission link:  http://research.ac.upc.edu/multiprog/


Organizers
----------
Miquel Pericàs            Chalmers University of Technology   Sweden   miquelp[at]chalmers.se
Vassilis Papaefstathiou   FORTH                               Greece   
Oscar Palomar             University of Manchester            UK       oscar.palomar[at]manchester.ac.uk
Ferad Zyulkyarov          Barcelona Supercomputing Center     Spain    ferad.zyulkyarov[at]bsc.es


Program committee
------------------
Abdelhalim Amer         Argonne National Lab            USA
Ali Jannesari           UC Berkeley                     USA
Avi Mendelson           Technion                        Israel
Chris Adeyeni-Jones     ARM                             UK
Christos Kotselidis     University of Manchester        UK
Dong Ping Zhang         AMD                             USA
Håkan Grahn             Blekinge TH                     Sweden
Hans Vandierendonck     Queen’s University Belfast      UK
Kenjiro Taura           University of Tokyo             Japan
Magnus Sjalander        NTNU                            Norway
Oscar Plata             University of Malaga            Spain
Pedro Trancoso          University of Cyprus            Cyprus
Polyvios Pratikakis     FORTH-ICS                       Greece
Roberto Gioiosa         PNNL                            USA
Sasa Tomic              IBM Research                    Switzerland
Timothy G. Mattson      Intel                           USA
Trevor E. Carlson       Uppsala University              Sweden
Yungang Bao             ICT-CAS                         China

Workshop site
-----------------
http://research.ac.upc.edu/multiprog/