2002 HPC Group Publications

PhD Thesis

• Alex Ramírez. High Performance Instruction Fetch Using Software and Hardware Co-design. PhD thesis, Universitat Politècnica de Catalunya (UPC), July 2002. Advisor Josep-L. Larriba-Pey and Mateo Valero. Available as Technical Report UPC-DAC-2002-23.

• Enric Morancho. Address Prediction and Recovery Mechanisms. PhD thesis, Universitat Politècnica de Catalunya (UPC), July 2002. Advisor Angel Olivé and José M. Llabería. Available as Technical Report UPC-DAC-2002-24.

• Germán Larrazabal. Técnicas Algebraicas de Precondicionamiento para la Resolución de Sistemas Lineales. PhD thesis, Universitat Politècnica de Catalunya (UPC), May 2002. Advisor José M. Cela.

• Jesús Corbal. N-dimensional vector ISAs for multimedia applications. PhD thesis, Universitat Politècnica de Catalunya (UPC), July 2002. Advisor Roger Espasa and Mateo Valero.

• Julita Corbalán. Coordinated Scheduling and Dynamic Performance Analysis in Multiprocessor Systems. PhD thesis, Universitat Politècnica de Catalunya (UPC), July 2002. Advisor Jesús Labarta and Xavier Martorell. Available as Technical Report UPC-DAC-2002-26.

• Javier Zalamea. Organization and Compiler Management of Register Files. PhD thesis, Universitat Politècnica de Catalunya (UPC), November 2002. Advisor Josep Llosa and Eduard Ayguadé.

• María Jesús Garzarán. Prebúsqueda Hardware, Soporte para Reducción, y Almacenamiento de Estado Especulativo en Multiprocesadores de Memoria Compartida. PhD thesis, Universidad de Zaragoza, June 2002. Advisor Victor Viñals, José M. Llabería and Josep Torrellas.

Journals

• Alex Ramírez, Josep-L. Larriba-Pey, Carlos Navarro, Mateo Valero and Josep Torrellas. Software Trace Cache for Commercial Applications. International Journal of Parallel Programming, pp. 373-395, vol. 30, no. 5, October 2002.

• Carlos Álvarez, Jesús Corbal, Esther Salamí and Mateo Valero. Initial Results on Fuzzy Floating Point Computation for Multimedia Processors. Computer Architecture Letters, pp. 6-9, vol. 1, no. 1, March 2002.

• Joel Emer, Pritpal Ahuja, Eric Borch, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan Binkert, Roger Espasa and Toni Juan. Asim: A Performance Model Framework. IEEE Computer, pp. 68-76, vol. 35, no. 2, February 2002.

• Jesús Labarta, Eduard Ayguadé, José Oliver and David Henty. New OpenMP Directives for Irregular Data Access Loops. Scientific Programming, pp. 175-183, vol. 9, no. 2-3, March 2002.

• Luis Díaz de Cerio, Miguel Valero-García and Antonio González. Hypercube Algorithms on Mesh Connected Multicomputers. IEEE Transactions on Parallel and Distributed Systems, pp. 1247-1260, vol. 13, no. 12, December 2002.

• Marta Jiménez, José M. Llabería and Agustín Fernández. Register Tiling in Nonrectangular Iteration Spaces. ACM Transactions on Programming Languages and Systems, pp. 409-453, vol. 24, no. 4, July 2002.

• Mateo Valero. Costo Energético de la Revolución Informática. Revista de Libros, pp. 30-31, no. 65, May 2002.

• Dimitrios Nikolopoulos, Theodore Papatheodorou, C.D. Polychronopoulos, Jesús Labarta and Eduard Ayguadé. Scheduler-activated Dynamic Page Migration for Multiprogrammed DSM Multiprocessors. Journal of Parallel and Distributed Computing, pp. 1069-1103, vol. 62, no. 6, June 2002.

• Dimitrios Nikolopoulos, Eduard Ayguadé and C.D. Polychronopoulos. Runtime vs. Manual Data Distribution for Architecture-agnostic Shared-memory Programming Models. International Journal of Parallel Programming, pp. 225-254, vol. 30, no. 4, August 2002.

• Rajkumar Buyya, Hai Jin and Toni Cortés. Guest editorial. Special issue on Cluster Computing. Future Generation Computer Systems, pp. 5-8, vol. 18, no. 3, January 2002.

• R. Desikan, D. Bourger, S.W. Keckler, José Lorenzo Cruz, Fernando Latorre, Antonio González and Mateo Valero. Errata on Measuring Experimental Error in Microprocessor Simulation. ACM, Computer Architecture News, pp. 2-4, vol. 30, no. 1, March 2002.

Conference Proceedings

• Alex Aletà, Josep M. Codina, Jesús Sánchez, Antonio González and David Kaeli. Register Pressure Based Modulo Scheduling for Clustered VLIW Architectures. In Jornadas de Concurrencia 2002, pp. 1-10, June 2002.

• Alex Aletà, Josep M. Codina, Jesús Sánchez, Antonio González and David Kaeli. Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning. In The 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT'2002), pp. 281-290, September 2002.

• Adrian Cristal and Mateo Valero. ROBs Virtuales utilizando checkpoints. In XIII Jornadas de Paralelismo, pp. - , September 2002.

• Ayose Falcón, Oliverio J. Santana, Pedro Medina, Enrique Fernández, Alex Ramírez and Mateo Valero. Studying New Ways for Improving Adaptive History Length Branch Predictors. In 4th International Symposium on High Performance Computing (ISHPC-4), pp. 271-279, May 2002.

• Alejandro Garcia, Enrique Fernández, Pedro Medina, Alex Ramírez and Mateo Valero. Analisis y caracterización de los bucles. In XIII Jornadas de Paralelismo, pp. - , September 2002.

• Alan Snavely, Laura Carrington, Nicole Wolter, Jesús Labarta, Rosa M. Badia and Avi Purkayastha. A Framework for Performance Modeling and Prediction. In Supercomputing 2002, pp. 21-21, November 2002. Los proceedings completos se publicaron en CD.

• M.Angels Moncusi, Alex Arenas and Jesús Labarta. Power Low Modified Dual Priority in Hard Real Time Systems with Resource Requirements . In Workshop on Compilers and Operating Systems for Low Power (COLP2002), pp. 81-83, September 2002. In conjunction with PACT 2002.

• Alex Ramírez, Oliverio J. Santana, Josep-L. Larriba-Pey and Mateo Valero. Fetching Instruction Streams. In 35th Annual International Symposium on Microarchitecture (MICRO-35), pp. 371-382, January 2002.

• Carlos Molina, Antonio González and Jordi Tubella. Trace Level Speculative MultiThreaded Architectures. In International Conference on Computer Design (ICCD-02), pp. - , September 2002.

• David Carrera, Jordi Guitart, Jordi Torres, Eduard Ayguadé and Jesús Labarta. An Instrumentation Tool for Threaded Java Application Servers. In XIII Jornadas de Paralelismo, pp. 205-210, September 2002.

• Daniel Jiménez, Juan J. Navarro and Josep-L. Larriba-Pey. The Effect of Local Sort on Parallel Sorting Algorithms. In 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing (PDP'2002), pp. 360-367, January 2002.

• Daniel Ortega, Eduard Ayguadé, Jean-Loup Baer and Mateo Valero. A Novel Mechanism that Boosts Software Prefetching. In The 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT'2002), pp. 189-198, September 2002.

• Daniel Ortega, Eduard Ayguadé, Jean-Loup Baer and Mateo Valero. Cost-Effective Compiler Directed Memory Prefetching and Bypassing. In The 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT'2002), pp. 189-198, September 2002.

• Enric Gibert, Jesús Sánchez and Antonio González. Effective Instruction Scheduling Techniques for an Interleaved Cache Clustered VLIW Processor. In 35th Annual International Symposium on Microarchitecture (MICRO-35), pp. 123-133, January 2002.

• Enric Gibert, Jesús Sánchez and Antonio González. An Interleaved Cache Clustered VLIW Processor. In 16th Annual ACM International Conference on Supercomputing (ICS'2002), pp. 210-219, June 2002.

• Enric Gibert, Jesús Sánchez and Antonio González. Compilation Techniques for a Word-Interleaved Cache Clustered VLIW Processor. In 10th Workshop on Compilers for Parallel Computers (CPC 2003), pp. - , 2002.

• Enric Gibert, Jesús Sánchez and Antonio González. Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data Cache. In International Conference on Parallel Processing ICPP-03, pp. 193-203, March 2003.

• Ernest Artiaga, José I. Navarro, Eduard Ayguadé and Jesús Labarta. Dynamic Loop Schedules and Memory Behavior. In 4th European Workshop on OpenMP, pp. - , September 2002.

• Esther Salamí, Jesús Corbal, Carlos Álvarez and Mateo Valero. Cost Effective Memory Disambiguation for Multimedia Codes. In Internacional Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2002), pp. 117-126, October 2002.

• Francisco J. Cazorla, Pedro Medina, Enrique Fernández, Alex Ramírez and Mateo Valero. Estudio y evaluación de mecanismos de control de la Especulación. In XIII Jornadas de Paralelismo, pp. - , September 2002.

• Felix Freitag, Jordi Caubet and Jesús Labarta. On the scalability of tracing mechanisms. In Intl. Euro-Par Conference, pp. 97-104, January 2002.

• Felix Freitag, Jordi Caubet and Jesús Labarta. A Trace-Scaling Agent for Parallel Application Tracing. In 14th IEEE International Conference on Tools with Artificial Intelligence, pp. 494-499, November 2002.

• Jesús Sánchez, Enric Gibert and Antonio González. Compilation Techniques for a Word-Interleaved Cache Clustered VLIW Processor. In International Conference on Parallel Processing ICPP-03, pp. - , January 2003.

• Hans Vandierendonck, Alex Ramírez, Koenraad De Bosschere and Mateo Valero. A comparative study of redundancy in trace caches. In Intl. Euro-Par Conference, pp. 512-516, August 2002.

• Jaume Abella, Antonio González, Josep Llosa and Xavier Vera. Near-Optimal Loop Tiling by means of Cache Miss Equations and Genetic Algorithms. In ICPP 2002 Workshop on Compile Runtime Techniques for Parallel Computing, pp. 568-577, January 2002.

• Jaume Abella, Antonio González, Josep Llosa and Xavier Vera. Near-Optimal Loop Tiling by means of Cache Miss Equations and Genetic Algorithms. In XIII Jornadas de Paralelismo, pp. 293-298, September 2002.

• Josep Aguilar Saborit, Victor Muntes and Josep-L. Larriba-Pey. Pushing Down Bit Filters. In XIII Jornadas de Paralelismo, pp. 389-395, September 2002.

• Josep M. Banus, Alex Arenas and Jesús Labarta. An Efficient Scheme to Allocate Soft-Aperiodic Tasks in Multiprocessor Hard Real-Time Systems. In International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA 2002), pp. 809-815, June 2002.

• Jesús Corbal, Roger Espasa and Mateo Valero. Three Dimensional Memory Vectorization for High Bandwidth Media Memory Systems. In 35th Annual International Symposium on Microarchitecture (MICRO-35), pp. - , November 2002.

• Joan M. Parcerisa, Julio Sahuquillo, Antonio González and José Duato. Efficient Interconnects for Clustered Microarchitectures. In The 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT'2002), pp. 291-300, September 2002.

• Josep Llosa and Stefan Freudenberger. Reduced Code Size Modulo Scheduling in the Absence of Hardware Support. In 35th Annual International Symposium on Microarchitecture (MICRO-35), pp. 99-110, November 2002.

• Josep R. Herrero and Juan J. Navarro. Building libraries for small matrix kernels. In XIII Jornadas de Paralelismo, pp. 235-238, September 2002.

• Juan Piernas, Toni Cortés and José M. García. DualFS: a New Journaling File System without Meta-Data Duplication . In 16th Annual ACM International Conference on Supercomputing (ICS'2002), pp. 137-146, June 2002.

• Juan Piernas, Toni Cortés and José M. García. DualFS: Towards a New Journaling File System . In XIII Jornadas de Paralelismo, pp. - , 2002.

• Javier Verdu, Jesús Corbal, Jorge García and Mateo Valero. Retos en el Diseño de Network Processors. In XIII Jornadas de Paralelismo, pp. - , September 2002.

• Marc González, Eduard Ayguadé, Xavier Martorell, Jesús Labarta and Phu Luong. Dual-level Parallelism Exploitation with OpenMP in Coastal Ocean Circulation Modeling. In 2nd Workshop on OpenMP, pp. 469-478, May 2002. Lecture NOtes in Computer Science vol 2327.

• Marsha Eng, Hong Wang, Perry Wang, Alex Ramírez, J Fung and John Shen. Mesocode: Optimizations for Improving Fetch Bandwidth of Itanium Processors. In Workshop on Complexity-Effective Design, pp. - , May 2002.

• Manel Fernández and Roger Espasa. Speculative Alias Analysis for Executable Code. In The 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT'2002), pp. - , September 2002.

• Alex Pajuelo, Antonio González and Mateo Valero. Speculative Dynamic Vectorization. In The 29th Annual International Symposium on Computer Architecture (ISCA'2002), pp. 271-280, May 2002.

• Alex Pajuelo, Antonio González and Mateo Valero. Vectorización Dinámica Especulativa. In XIII Jornadas de Paralelismo, pp. - , September 2002.

• Oliverio J. Santana, Ayose Falcón, Enrique Fernández, Pedro Medina, Alex Ramírez and Mateo Valero. A Comprehensive Analysis of Indirect Branch Prediction. In 4th International Symposium on High Performance Computing (ISHPC-4), pp. 133-141, May 2002.

• Peter Knijnenburg, Alex Ramírez, Fernando Latorre, Josep-L. Larriba-Pey and Mateo Valero. Branch Classification to Control Instruction Fetch in Simultaneous Multithreaded Architectures. In 2002 International Workshop on Innovative Architecture (IWIA 2002), pp. 67-76, August 2002.

• Peter Knijnenburg, Alex Ramírez, Josep-L. Larriba-Pey and Mateo Valero. Branch classification for SMT fetch gating. In 6th Workshop on Multithreaded Execution, Architecture and Compilation (MTEAC6), pp. - , November 2002.

• Pedro Marcuello and Antonio González. Thread Spawing Schemes for Speculative Multithreading. In 8th International Symposium on High-Performance Computer Architecture (HPCA 8), pp. 48-57, February 2002.

• Roger Espasa, Federico Ardanaz, Joel Emer, Stephen Felix, Julio Gago, Roger Gramunt, Isaac Hernández, Toni Juan, Geoffrey Lowney, Matthew Mattina and André Seznec. Tarantula: A Vector Extension to the Alpha Architecture. In The 29th Annual International Symposium on Computer Architecture (ISCA'2002), pp. 281-292, May 2002.

• Tor Aamodt, Pedro Marcuello, P. Chow, Per Hammarlund and Hong Wang. Prescient Instruction Prefetch. In 6th Workshop on Multithreaded Execution, Architecture and Compilation (MTEAC6), pp. 2-10, November 2002.

Book Chapters

• Toni Cortés, Sergi Girona and Jesús Labarta. Design Issues of a Cooperative Cache with no Coherence Problems. In High Performance Mass Storage and Parallel I/O: Techniques and Applications, IEEE Press and Wiley, January 2002.