2001 HPC Group Publications

PhD Thesis

• Jesús Sánchez. Smart Memory Management through Locality Analysis. PhD thesis, Universitat Politècnica de Catalunya (UPC), November 2001. Advisor Antonio González.

• Francisca Quintana. Aceleradores Vectoriales para Procesadores Superescalares. PhD thesis, Universidad de Las Palmas de Gran Canaria, December 2001. Advisor Roger Espasa and Mateo Valero.

Journals

• Alex Ramírez, Josep-L. Larriba-Pey and Mateo Valero. Instruction Fetch Architectures and Code Layout Optimizations. Proceedings of the IEEE, pp. 1588-1609, vol. 89, no. 11, November 2001.

• David López, Josep Llosa, Mateo Valero and Eduard Ayguadé. Cost-Conscious Strategies to Increase Performance of Numerical Programs on Aggressive VLIW Architectures. IEEE Transactions on Computers, pp. 1033-1051, vol. 50, no. 10, October 2001.

• Dolors Royo, Miguel Valero-García and Antonio González. Implementing the One-Sided Jacobi Method on a 2d/3d Mesh Multicomputer. Parallel Computing, pp. 1253-1271, vol. 27, no. 9, August 2001.

• Joan M. Parcerisa and Antonio González. Improving Latency Tolerance of Multithreading through Decoupling. IEEE Transactions on Computers, pp. 1084-1094, vol. 50, no. 10, October 2001.

• Jordi Garcia, Eduard Ayguadé and Jesús Labarta. A Framework for Integrating Data Alignment, Distribution, and Redistribution in Distributed Memory Multiprocessors. IEEE Transactions on Parallel and Distributed Systems, pp. 416-431, vol. 12, no. 4, April 2001.

• José Oliver, Jordi Guitart, Eduard Ayguadé, José I. Navarro and Jordi Torres. Strategies for the efficient exploitation of loop-level parallelism in Java. Concurrency, pp. 663-680, vol. 13, no. 8-9, July 2001.

• Josep Llosa, Eduard Ayguadé, Antonio González, Mateo Valero and Jason Eckhardt. Lifetime-sensitive Modulo Scheduling in a Production Environment. IEEE Transactions on Computers, pp. 234-249, vol. 50, no. 3, March 2001.

• M. Kandemir, P. Banerjee, A. Choudhary, J. Ramanujam and Eduard Ayguadé. Static and Dynamic Locality Optimizations Using Integer Linear Programming. IEEE Transactions on Parallel and Distributed Systems, pp. 922-941, vol. 12, no. 9, September 2001.

• Luis Díaz de Cerio, Miguel Valero-García, Antonio González and Dolors Royo. CALMANT: Un método Sistemático para la Ejecución de Algoritmos Hipercubo en Sistemas Multiprocesador. Computación y Sistemas, pp. 289-297, vol. 4, no. 4, April 2001.

• Luis Díaz de Cerio, Miguel Valero-García, Antonio González and Dolors Royo. CALMANT: A systematic Method for the Execution of Hypercube Algorithms in Multiprocessor Systems. Computación y Sistemas, pp. 298-305, vol. 4, no. 4, April 2001.

• Mateo Valero. Premios Nacionales de Investigación. Revista de Industria y Mineria, pp. 29-32, no. 346, December 2001.

• Dimitrios Nikolopoulos, Theodore Papatheodorou, C.D. Polychronopoulos, Jesús Labarta and Eduard Ayguadé. A Transparent Runtime Data Distribution Engine for OpenMP. Scientific Programming, pp. 143-162, vol. 8, no. 3, July 2001. Special issue Best Papers from SC2000..

• Dimitrios Nikolopoulos, Ernest Artiaga, Eduard Ayguadé and Jesús Labarta. Exploiting Memory Affinity in OpenMP through Schedule Reuse. ACM, Computer Architecture News, pp. 49-55, vol. 29, no. 5, December 2001. Special issue on selected papers from PACT'01 workshops.

• Nirav Kapadia, José A.B. Fortes, Mark S. Lundstrom and Dolors Royo. PUNCH: A Computing Portal for the Virtual University. International Journal of Engineering Education (IJEE), vol. 17, no. 2, January 2001.

• Pau Bofill and Michael Zibulevsky. Underdetermined blind source separation using sparse representations. Signal Processing, pp. 2353-2362, vol. 81, January 2001.

• Pau Bofill and Carme Torras. Neural Cost Functions and Search Strategies for the Generation of Block Designs: an Experimental Evaluation. International Journal of Neural Systems, pp. 187-202, vol. 11, no. 2, March 2001.

• Rajkumar Buyya, Toni Cortés and Hai Jin. Single System Image. International Journal of High Performance Computing Applications, pp. 124-135, vol. 15, no. 2, May 2001.

• Ramon Canal, Joan M. Parcerisa and Antonio González. Dynamic Code Partitioning for Clustered Architectures. International Journal of Parallel Programming, pp. 59-79, vol. 29, no. 1, February 2001.

• S. Bartolini, R. Giorgi, J. Protic, C.A. Prete and Mateo Valero. Parallel Architecture and Compilation Techniques: Selection of Workshop Papers, Guests Editors Introduction. ACM, Computer Architecture News, pp. 9-12, vol. 29, no. 5, December 2001.

• Sriram Vajapeyam and Mateo Valero. Early 21st Century Processors. IEEE Computer, pp. 47-50, vol. 34, no. 4, April 2001.

Conference Proceedings

• Alex Aletà, Josep M. Codina, Jesús Sánchez and Antonio González. Graph-Partitioning Based Instruction Scheduling for Clustered Processors. In 34th International Symposium on Microarchitecture (MICRO-34), pp. 150-159, December 2001.

• Ayose Falcón, Oliverio J. Santana, Pedro Medina, Enrique Fernández, Alex Ramírez and Mateo Valero. An Analysis of Dynamic History Length Fitting. In XII Jornadas de Paralelismo, pp. - , September 2001.

• Alex Ramírez, Luiz A. Barroso, Kourosh Gharachorloo, Robert Cohn, Josep-L. Larriba-Pey, Geoffrey Lowney and Mateo Valero. Code Layout Optimizations for Transaction Processing Workloads. In 28th Annual International Symposium on Computer Architecture (ISCA-28), pp. 155-164, June 2001.

• Alex Ramírez, Josep-L. Larriba-Pey and Mateo Valero. Branch Prediction Using Profile Data. In 7th International Euro-Par Conference (Euro-Par'2001), pp. 386-393, August 2001.

• Carlos Álvarez, Jesús Corbal, Esther Salamí and Mateo Valero. On the Potential of Tolerant Region Reuse for Multimedia Applications. In 15th ACM International Conference on Supercomputing (ICS'2001), pp. 218-228, June 2001.

• Carlos Álvarez, Jesús Corbal, Esther Salamí and Mateo Valero. Fuzzy Memoization for Floating Point Multimedia Applications. In 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), pp. - , September 2001. Best Work in Progress Paper (no publicado en los proceedings).

• Daniele Folegnani and Antonio González. Energy Effective Issue Logic. In 28th Annual International Symposium on Computer Architecture (ISCA-28), pp. 230-239, June 2001.

• Daniel Jiménez, Juan J. Navarro and Josep-L. Larriba-Pey. Fast Parallel In-Memory 64-bit Sorting. In 15th ACM International Conference on Supercomputing (ICS'2001), pp. 114-122, June 2001.

• Dolors Royo and Luis Díaz de Cerio. Active Yellow Pages (ActYP): A Resource Management System for PUNCH Educational Laboratories. In European Conference on Computer-Supported Collaborative Learning (Euro-CSCL) , pp. 688-689, March 2001.

• Dolors Royo, Nirav Kapadia, José A.B. Fortes and Luis Díaz de Cerio. Active Yellow Pages: A Pipelined Resource Management Architecture for Wide-Area Network Computing. In Tenth IEEE International Symposium in High Performance Distributed Computing (HPDC'2001), pp. 147-157, August 2001.

• Daniel Ortega, Mateo Valero and Eduard Ayguadé. A Novel Renaming Mechanism that Boosts Software Prefetching. In 15th ACM International Conference on Supercomputing (ICS'2001), pp. 501-510, June 2001.

• Eduard Ayguadé, Fredrik Dahlgren, Christine Eisenbeis, Roger Espasa, Guang R. Gao, Henk Muller, Rizos Sakellariou and André Seznec. Instruction-Level Parallelism and Computer Architecture. In 7th International Euro-Par Conference (Euro-Par'2001), pp. 385-385, August 2001.

• Eduard Ayguadé, Mats Brorsson, H. Brunst, Hans-Christian Hoppe, Sven Karlsson, Xavier Martorell, Wolfgang Nagel, Frank Schlimbach, Gladys Utrera and Manuela Wrinkler. OpenMP Performance Analysis Approach in the INTONE Project. In 3rd European Workshop on OpenMP (EWOMP-2001), pp. 19-25, September 2001.

• Enric Morancho, José M. Llabería and Angel Olivé. Recovery Mechanism for Latency Misprediction. In 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), pp. 118-128, September 2001.

• Ernest Artiaga and Marisa Gil. Running Multithreaded Applications in Exokernel-based Systems: Porting CThreads to Xok. In 9th Euromicro Workshop on Parallel and Distributed Processing, pp. 77-83, February 2001.

• Felix Freitag, Julita Corbalán and Jesús Labarta. A Dynamic Periodicity Detector: Application to Speedup Computation. In 15th International Parallel and Distributed Processing Symposium (IPDPS'2001), pp. 2-8, April 2001.

• Germán Larrazabal and José M. Cela. A Parallel Algebraic Preconditioner for the Schur Complement System. In International Parallel and Distributed Processing Symposium, pp. - , April 2001.

• Henry Jin, Gabriele Jost, Jerry Yan, Eduard Ayguadé, Marc González and Xavier Martorell. Automatic Multilevel Parallelization Using OpenMP. In 3rd European Workshop on OpenMP (EWOMP-2001), pp. 45-55, September 2001.

• Jesús Corbal, Roger Espasa and Mateo Valero. DLP + TLP Processors for the Next Generation of Media Workloads. In The Seventh International Symposium on High Performance Computer Architecture (HPCA7), pp. 219-228, January 2001.

• Jesús Corbal, Roger Espasa and Mateo Valero. On the efficiency of reductions for micro-SIMD media extensions. In 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), pp. 83-94, September 2001.

• Jordi Guitart, Xavier Martorell, Jordi Torres and Eduard Ayguadé. Efficient Execution of Parallel Java Applications. In 3rd Annual Workshop on Java for High-Performance Computing, pp. 31-35, June 2001.

• Jordi Guitart, Jordi Torres, Eduard Ayguadé and J. Mark Bull. Performance Analysis Tools For Parallel Java Applications on Shared-memory Systems. In 30th International Conference on Parallel Processing (ICPP'01), pp. 357-364, September 2001.

• Josep M. Codina, Jesús Sánchez and Antonio González. URACAM: A Unified Register Allocation, Clustr Assignment and Modulo Scheduling Approach. In 9th International Workshop on Compilers for Parallel Computers (CPC 2001), pp. 23-33, June 2001.

• Josep M. Codina, Jesús Sánchez and Antonio González. A Unified Modulo Scheduling and Register Allocation Technique for Clustered Processors. In 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), pp. 175-184, September 2001.

• Josep M. Codina, Jesús Sánchez and Antonio González. URACAM: A Unified Register Allocation, Cluster Assignment and Modulo Scheduling Approach. In 9th International Workshop on Compilers for Parallel Computers (CPC 2001), pp. - , June 2001.

• Josep R. Herrero and Juan J. Navarro. Nearest Neighbor Classification on a High Performance Workstation. In XII Jornadas de Paralelismo, pp. 257-263, September 2001.

• Julita Corbalán and Jesús Labarta. Improving Processor Allocation through Run-Time Measured Efficiency. In 15th International Parallel and Distributed Processing Symposium (IPDPS'2001), pp. 74-80, April 2001.

• Julita Corbalán, Xavier Martorell and Jesús Labarta. Improving Gang Scheduling through Job Performance Analysis and Malleability. In 15th ACM International Conference on Supercomputing (ICS'2001), pp. 303-311, June 2001.

• Javier Zalamea, Josep Llosa, Eduard Ayguadé and Mateo Valero. MIRS: Modulo Scheduling with Integrated Register Spilling. In 14th International Workshop on Programming Languages and Compilers for Parallel Computing (LCPC'01) , pp. 239-253, August 2001. Lecture Notes in Computer Science vol. 2624.

• Javier Zalamea, Josep Llosa, Eduard Ayguadé and Mateo Valero. Modulo Scheduling with Integrated Register Spilling for Clustered VLIW Architectures. In 34th International Symposium on Microarchitecture (MICRO-34), pp. 160-169, December 2001.

• Marc González, Eduard Ayguadé, Xavier Martorell and Jesús Labarta. Defining and Supporting Pipelined Executions in OpenMP. In 2nd International Workshop on OpenMP Applications and Tools (WOMPAT-01), pp. 155-169, July 2001. Lecture Notes in Computer Science vol. 2104.

• Marc González, Eduard Ayguadé, Xavier Martorell and Jesús Labarta. Complex Pipelined Executions in OpenMP Parallel Applications. In 30th International Conference on Parallel Processing (ICPP'01), pp. 295-302, September 2001.

• Manel Fernández, Roger Espasa and Saumya Debray. Load Redundancy Elimination on Executable Code. In 7th International Euro-Par Conference (Euro-Par'2001), pp. 221-229, August 2001.

• María Jesús Garzarán, Milos Prvulovic, José M. Llabería, Victor Viñals, Lawrence Rauchwerger and Josep Torrellas. Software Logging under Speculative Parallelization. In Workshop on Memory Performance Issues, held in conjunction with The 28th Annual International Symposium on Computer Architecture, pp. 1-8, June 2001.

• Dimitrios Nikolopoulos, Eduard Ayguadé, Theodore Papatheodorou, C.D. Polychronopoulos and Jesús Labarta. The Trade-off Between Implicit and Explicit Data Distribution in Shared-memory Programming Paradigms. In 15th ACM International Conference on Supercomputing (ICS'2001), pp. 23-37, June 2001.

• Dimitrios Nikolopoulos and Eduard Ayguadé. A Study of Implicit Data Distribution Methods for OpenMP Using the SPEC Benchmarks. In 2nd International Workshop on OpenMP Applications and Tools (WOMPAT-01), pp. 115-129, July 2001. Lecture Notes in Computer Science vol. 2104.

• Dimitrios Nikolopoulos, Ernest Artiaga, Eduard Ayguadé and Jesús Labarta. Exploiting Memory Affinity in OpenMP Through Schedule Reuse. In 3rd European Workshop on OpenMP (EWOMP-2001), pp. 85-92, September 2001.

• Dimitrios Nikolopoulos, Eduard Ayguadé and C.D. Polychronopoulos. Scaling Irregular Parallel Codes with Minimal Programming Effort. In IEEE/ACM Supercomputing 2001, pp. - , November 2001.

• Oliverio J. Santana, Ayose Falcón, Enrique Fernández, Pedro Medina, Alex Ramírez and Mateo Valero. An In-Depth Evaluation of the Multi-Stage Cascaded Predictor. In XII Jornadas de Paralelismo, pp. - , September 2001.

• Francisca Quintana, Jesús Corbal, Roger Espasa and Mateo Valero. A Cost Effective Architecture for Vectorizable Numerical and Multimedia Applications. In Thirteenth ACM Symposium on Parallel Algorithms and Architectures (SPAA 2001), pp. - , July 2001.

• Ramon Canal and Antonio González. Reducing the Complexity of the Issue Logic. In 15th ACM International Conference on Supercomputing (ICS'2001), pp. 312-320, June 2001.

• Ronaldo Gonçalves, Eduard Ayguadé, Mateo Valero and Philippe Navaux. Performance Evaluation of Decoding and Dispatching Stages in Simultaneous Multithreaded Architectures. In 13th Symposium on Computer Architecture and High Performance Computing(SBAC-PAD'2001), pp. 90-97, September 2001.

• Yiannakis Sazeides and Toni Juan. How to compare the performance of two SMT microarchitectures. In 2001 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2001), pp. 180-183, January 2001.

• Toni Cortés and Jesús Labarta. Extending Heterogeneity to RAID level 5. In USENIX Annual Technical Conference, pp. 119-132, June 2001.

Book Chapters

• Michael Zibulevsky, Barak A. Pearlmutter, Pau Bofill and P. Kisiliev. Blind source separation by sparse decomposition in a signal dictionary. In Independent Component Analysis: Principles and Practice, Cambridge University Press, January 2001.